Mr.Umesh Bhandare has been kind
enough to forward this job offer for the benefit of fellow Swakula Salis.
Make maximum use of this and spread
the word among fellow Salis.
While sending the resume, do send a
cc to Mr.Umesh Bhandare. His email is ssssblr.umesh@gmail.com
The Job offer goes like this….
Thanks for your continued support in
making “ PARICHAY” successful !
In 2011, we hired about 40% of our
new employees through “PARICHAY” – Juniper India’s employee referral program.
We look forward to receiving
referrals for the below mentioned position in PSD
– Silicon ( ASIC )
Please send in your referrals to parichay@juniper.net with
a CC to shantonu@juniper.net in WORD DOC format only.
Please do not “reply all” to this
message.
Thanks and Regards,
Team “PARICHAY”- India Staffing Team
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Position :
ASIC Engineer / Staff
Role :
Sr./Lead ASIC Design
Experience
: 7+ years
Job
Location: Bangalore
Job Summary
Lead design team to successfully
complete block level/full chip design.
Responsibilities
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Position :
ASIC Engineer / Staff
Role :
Sr./Lead ASIC Verification
Experience
: 8+ years
Job
Location: Bangalore
Job Summary
Lead verification team to
successfully complete block/chip/system level verification.
Responsibilities
|
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Position:
ASIC Engineer
Role:
Physical Design Engineer
Location:
Bangalore
Job Specification:
Work with internal Physical design
teams and EDA vendors to develop and support ASIC physical design flow.
The position requires an overall understanding of the physical design flow
from RTL to GDS. The successful candidate will possess in-depth
knowledge & experience in physical synthesis, design planning, floor
planning, place & route, static timing analysis, and design closure &
physical verification
Responsibilities
· Work with design to identify areas of flow improvement,
develop plans and implement improvements.
· Support ASIC design tools such as DC, ICC, Magma, STAR-RC,
PT-SI, Verplex, Quartz, Calibre, internal tools & flow, etc.
· Provide tool support and debug issues for & with
members of design team.
· Develop & maintain tool integration and productivity
enhancement tools.
· Develop and maintain a robust release mechanism for the
distribution of the design environment.
· Document & train designers on new methodology &
flow usage.
· Incorporate new tools to improve productivity into block
level & full chip flow.
· Test new features of tool and incorporate the new features
when applicable.
· Enhance current methodology to improve efficiency.
· Will be responsible for all aspects of physical design for
a block while developing methodology.
Qualification Requirements
· 4+ years of experience in physical design.
· Experienced in design automation.
· Understanding of timing constraints, SI prevention, power
reduction.
· Must have prior experience with place and route tools such
as ICC. Magma and etc.
·
Must have worked on all aspects of
physical design from placement to route, including extraction, timing, noise
and EM IR analysis and fixes.
· Must have completed design on 40nm and/or 28nm.
· Proficient in Unix/TCL/Perl.
Good communication and presentation skills. Requires
good interpersonal skills and problem-solving ability.
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What Juniper India ASIC offers?
ASIC Technology
Juniper ASIC team in Bangalore
owns multiple major blocks / modules / chips across next generation...
Juniper ASIC
ASIC is the differentiator
starting from our 1st router to our latest products. Our ASIC’s have been
feature rich without sacrifice in performance. Juniper ASIC Organizations
mission is to deliver on-time, error-free, high performing, scalable, lowest
cost, power efficient SILICON that is widely-deployable and beats the
competition. We have developed 3 generations of high end router chipsets.
ASIC was a differentiating factor for Juniper from our first product M40 to
the latest T4000 and MX960. We have a track record of delivering 90+ ASIC’s,
which were first time correct.
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Also visit
http://goodfundsadvisor.blogspot.com
